Rethinking GPU Power Delivery With Supercapacitors

Modern AI GPUs now operate in the kilowatt class, but total power is not the real challenge. The engineering bottleneck lies in how fast the power must change. A GPU can jump from idle to full compute in microseconds, and today’s power delivery networks (PDNs) struggle to keep up.

Multi-layer ceramic capacitors (MLCCs) are reaching their practical limits, voltage regulators cannot respond fast enough, and switching elements introduce hard physical barriers. With the rapid growth of AI compute density and racks such as NVIDIA’s GB300 NVL72 pushing unprecedented transient loads, on-package and near-package supercapacitors are becoming essential.

This article explains the chip-level behaviour in practical engineering terms, outlines the limitations of current PDN architectures, and shows how thin, low-ESR pouch-format supercapacitors can help stabilise next-generation GPU rails.

1. The Real Problem: Fast Transients at the Die

A GPU does not draw power smoothly. Instead, it behaves like a machine repeatedly stamping on the accelerator pedal. In AI workloads, thousands of cores wake up simultaneously, triggering steep current ramps.

When this happens, three things occur:

1.1 The current demand increases in microseconds

AI accelerators regularly see jumps such as:

From 50 A to 200 A in a few microseconds

1.2 Inductance slows the delivery

Even a few nanohenries in the PDN prevent current rising quickly enough.

1.3 Voltage droop appears at the GPU die

At core voltages around 1.0–1.2 V, a droop of only 30–50 mV can cause frequency clipping or instability.

These transient spikes—lasting from microseconds to milliseconds—are now one of the primary constraints on GPU design and data-centre reliability.

2. Why the PDN Is Failing to Scale

A complete GPU PDN includes:

• the voltage regulator module (VRM)

• power stages and inductors

• PCB planes and vias

• banks of MLCCs

• package connections

• on-die capacitance

Every section adds resistance and, more critically, inductance. Even 1–2 nH between the VRM and the die can destroy transient performance.

MLCC banks—often in the thousands on high-end boards—are now constrained by:

• limited PCB real estate

• mechanical cracking

• high ripple stress

• steep derating under DC bias (up to 80% loss)

• rising cost and supply volatility

This is why GPU designers have started to adopt supplementary energy reservoirs closer to the die, including supercapacitors.

3. Why Supercapacitors Are Attractive at the Chip Level

Supercapacitors offer several advantages over MLCCs for handling transient loads:

High energy per volume

Useful for microsecond-to-millisecond events.

Very low ESR

Tab-and-foil construction enables milliohm-class impedance.

Thin, flexible pouch formats

These can sit inside PCB cavities, at the package edge, or under the socket.

No DC-bias derating

Capacitance remains stable even under full rail voltage.

4. Making Supercapacitors Work at GPU Rail Voltages

GPU core rails typically operate at around 1.0–1.2 V, which is too low for traditional two- to three-volt supercapacitors.

Two design paths exist:

Option A: Low-voltage pouch supercapacitors

Specifically engineered for chip-level PDNs (nominal around 1 V).This is the direction many emerging suppliers, including Volfpack, are taking.

Option B: Intermediate DC-DC stages

Using charge pumps or inverting regulators to translate the operating voltage.

AI servers such as NVIDIA’s GB300 NVL72 use hybrid supercapacitors for rack-level transient shaping, signalling that component-level adoption is not far behind.

5. Worked Example (Wix-Safe Equations)

How much capacitance is needed to handle a GPU power spike?

Scenario:

• Rail voltage (V): 1.0 V

• Idle current (I_idle): 80 A

• Peak current (I_peak): 280 A

• Spike duration (t): 0.001 s (1 ms)

• Allowed voltage droop (dV): 0.05 V (50 mV)

Step 1: Calculate the current step

Delta_I = I_peak - I_idle
Delta_I = 280 A - 80 A
Delta_I = 200 A

Step 2: Capacitance needed

Use:

C = (Delta_I * t) / dV

Substitute:

C = (200 A * 0.001 s) / 0.05 V
C = 4 F

Step 3: ESR requirement for ripple control

Voltage ripple due to ESR:

V_ESR = Delta_I * ESR

Rearrange for ESR:

ESR = V_ESR / Delta_I

For a 25 mV ESR ripple target:

ESR = 0.025 V / 200 A
ESR = 0.000125 ohms  (0.125 milliohms)

This is far beyond the capability of MLCC banks but achievable with advanced pouch supercapacitors.

6. Placement and Packaging: The Inductance Battle

Supercapacitors only work if they are placed with minimal inductance. Key practices include:

• mounting close to GPU power pins

• using wide copper planes

• minimising via length and via count

• embedding devices in PCB cavities

• integrating pouches at the package perimeter

Compared with MLCC banks, thin supercapacitors allow placement strategies that maintain extremely low inductive paths.

7. Thermal Performance

Because supercapacitors have low ESR, resistive heating is modest. Their large surface area helps conduct heat into:

• the PCB

• the cold plate

• adjacent thermal paths

This makes thermal control simpler than traditional electrolytic or polymer capacitors.

8. Implications for the Future of GPU Power Delivery

As AI racks scale towards 70–100 GPUs per cluster, the transient load on each die becomes one of the primary system-level design challenges. Supercapacitors provide a new local energy reservoir that complements traditional capacitors.

Benefits include:

• reduced voltage droop

• improved clock stability

• better utilisation of transient power budgets

• smoother rack-level energy demand

• lower stress on VRMs and upstream PSUs

In the long term, supercapacitors will be a key enabler of multi-storey PDNs, chiplet-based GPU architectures, and sustainable AI power designs.

References

1. NVIDIA Developer Blog – How GB300 NVL72 Provides Steady Power for AI

2. TrendForce – GB300 Ignites Supercapacitor Adoption

3. Skeleton Technologies – Why AI Data Centres Need Supercapacitors

4. IEEE – Multi-Storey Power Distribution Networks for GPUs

5. Passive Components Europe – Supercapacitors for AI Transient Spikes

6. IEA – Energy Demand from AI

7. R&D World – The Energy Paradox of AI

8. Flex CESS – Capacitive Energy Storage Systems

9. BisResearch – Supercapacitor Market Forecast 2025–2035

10. NVIDIA – Building the 800 VDC Ecosystem for Scalable AI Factories