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Supercapacitor Backup Power Design for 5V Electronic Door Locks:

  • Writer: Mary Margret
    Mary Margret
  • 2 days ago
  • 4 min read

Complete Implementation Using Two Volfpack 10F Graphene Pouch Cells


Electronic door locks must remain operational during power outages, typically supporting 8–15 lock/unlock cycles plus microcontroller housekeeping. Volfpack Energy’s graphene-based 10F pouch cells (2.7 V nominal, ultra-low ESR <1 mΩ, >1 000 000 cycles, operating range –30 °C to +70 °C) provide a compact, maintenance-free solution. Using two 10F cells in series (2S configuration) creates a 5.4 V bank with 5 F equivalent capacitance. This delivers ample energy while fitting slim lock enclosures (typical pouch size per cell approximately 6–7 cm × 3–4 cm).


A 12 V rail is unnecessary. Readily available 5 V solenoids and DC gear motors provide sufficient force and torque for bolt retraction in residential, cabinet, and light commercial locks. Operating directly at 5 V eliminates the boost converter, reduces component count, lowers cost, and improves overall efficiency.


Volfpack 10F Cell Bank Topology and Energy Budget


Bank configuration: Two Volfpack 10F, 2.7 V pouch cells in series.

  • Equivalent capacitance: C_bank = 5 F

  • Maximum voltage: 5.4 V (charge safely to 5.0 V)

  • Minimum usable voltage: 2.5 V (ensures stable supply for 3.3 V LDO or direct actuator drive)


Usable energy calculation:

E = 1/2 × C × (V_i² - V_f²) = 1/2 × 5 × (5.0² - 2.5²) = 1/2 × 5 × (25 - 6.25) = 46.875 J


Apply conservative deratings for real-world conditions (Colombo ambient temperatures 30–40 °C):

  • 20 % end-of-life capacitance fade over 8–10 years

  • 8–12 % losses in driver, wiring, and minor ESR effects

  • 0.5–1.5 J for MCU housekeeping (15–30 mA at 3.3 V for 30–60 s)


Net usable energy: approximately 35–40 J


Actuator Power Profiles at 5 V


Two common actuator types operate directly from the supercap bank:


Solenoids (pull-type or latching):

  • Typical draw: 0.8–1.2 A peak for 150–400 ms pull-in

  • Energy per cycle: 1.0–3.0 J (peak-and-hold drive reduces this significantly by applying full voltage briefly then dropping for any hold phase)

  • Advantage: sub-50 ms response time; latching versions require only short pulses in each direction with zero continuous hold power.


Motorized actuators (5 V DC gear motor with worm or lead-screw self-locking):

  • Running current: 150–300 mA

  • Stall/peak: up to 400–500 mA for 0.8–1.5 s

  • Energy per cycle: 0.6–2.5 J

  • Advantage: quieter operation and zero hold power due to mechanical self-locking.


With 35–40 J net energy, the system supports 12–20+ cycles depending on actuator efficiency and drive technique (conservative estimate: 12–15 cycles with a solenoid or 15–20+ with a self-locking motor). This comfortably exceeds typical safety/egress requirements of 5–10 cycles.


Voltage drop during a 1.2 A pulse:

ΔV = I × ESR_bank ≈ 1.2 A × 2 mΩ = 2.4 mV (negligible; bank voltage remains essentially flat).


Charging Circuit


The main 5 V rail (from USB-C, PoE, or regulated adapter) continuously trickle-charges the bank using a dedicated supercapacitor charger IC.


Recommended device: Analog Devices LTC3225

  • Charges two cells in series to selectable 4.8 V or 5.3 V (use 5.0 V target)

  • Programmable charge current up to 150 mA with integrated active cell balancing

  • PGOOD flag for charge-complete indication

  • No balancing resistors required; low noise and low quiescent current


Charge profile: constant-current / constant-voltage (CCCV).

Approximate full charge time from 0 V at 150 mA:

t ≈ (C × V) / I = (5 × 5.0) / 0.15 ≈ 167 seconds (under 3 minutes).

The lock becomes operational within 30–60 seconds after power restoration.


Firmware handling (on MCU such as ESP32 or STM32):

- On power-up: enable charger until PGOOD asserts.

- Monitor main VIN via ADC or comparator (brown-out threshold ~4.5 V).

- On power loss: disable charger and switch to supercap-powered mode.


Power-Path and Backup Handover


The architecture is intentionally simple due to 5 V operation:


  • Main 5 V rail → ideal diode (LTC4412 or P-channel MOSFET controller) → system 5 V bus (MCU + actuator driver)

  • Supercap bank → same 5 V bus via low-dropout path with protection


Handover occurs in <10 µs with zero reverse current from supercap to main supply. Add 220 µF low-ESR ceramic capacitance on the 5 V bus to absorb actuator inrush current.


Actuator drive circuit:

  • H-bridge driver (e.g., DRV8833 or discrete MOSFETs) with soft-start PWM to limit inrush

  • Current-sense resistor (0.05 Ω) for stall detection and protection

  • Snubber network (0.1 µF + 10 Ω) across actuator terminals to suppress EMI


Protections, Thermal, and Environmental Considerations


- Over-voltage: charger clamps at safe level per cell; add 2.8 V TVS/zener per cell

- Under-voltage lockout: disable actuator drive below ~2.8 V to preserve MCU last-gasp functions

- Temperature: in Colombo conditions, limit charge voltage to 4.8–5.0 V maximum for minimal long-term fade

- Leakage current: total bank <5 µA → negligible self-discharge (<1 J per month)

- Short-circuit: polyfuse on bank output

- Reverse polarity protection: Schottky diodes during assembly

- MCU last-gasp routine: power-fail interrupt triggers BLE beacon (“power outage – lock operational”), event logging, and limited actuation attempts


Bill of Materials (Core Supercapacitor Section)


- 2 × Volfpack 10F, 2.7 V graphene pouch cells

- LTC3225 supercapacitor charger IC

- LTC4412 ideal diode controller

- DRV8833 or equivalent H-bridge driver

- Passives: 220 µF low-ESR ceramics, TVS diodes, snubbers, current-sense resistor


Estimated cost for supercap core at 1k volume: $5–9.


Prototype Validation Steps


1. Assemble 2S bank and verify balancing and total ESR (<2 mΩ).

2. Perform 5 000–10 000 charge/discharge cycles at realistic peak current while monitoring capacitance and ESR.

3. Simulate power outages using a relay; scope voltage rails to confirm clean handover and >12 cycles.

4. Test in thermal chamber at 45 °C to validate performance under local ambient conditions.


This design with two Volfpack 10F cells in a 5 V architecture provides robust, zero-maintenance backup power. It outperforms traditional batteries in cycle life, temperature resilience, and simplicity while keeping the solution compact and cost-effective. Volfpack prototypes are locally available in Sri Lanka, facilitating rapid iteration.


The bank offers comfortable margin for most residential and light commercial door locks. If higher force actuators or >20 cycles are required, parallel additional 2S strings or upgrade to higher-capacitance cells. Provide the specific actuator datasheet (current draw and pulse duration) or MCU platform for further schematic or firmware optimization.

 
 
 

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